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Architectural Developments Towards Exascale
Developing a computer system that can deliver sustained Exaflop performance is an extremely difficult challenge for the HPC and scientific community. In addition to developing hardware that can compute an Exaflop within a feasible power budget, scientific applications need to be able to exploit the performance that such a system can offer. The applications can only achieve this type of performance if they are supported by a complete stack of systemware, programming models, compilers, libraries and tools. However developing this stack, not to mention the applications, takes many man-years of effort. In order to be able to direct such efforts efficiently, it is important to try and predict what the architecture of an Exascale system may look like. Although it is obviously not possible to predict future developments with 100% accuracy, estimates that are based on the analysis of past trends in HPC system architecture development in conjunction with the trends in the current market will provide some guidance. In this white paper, we give our own analysis of the architectural developments towards Exascale systems and discuss the implications for the CRESTA co-design applications.
The Exascale Development Environment - State of the Art and Gap Analysis
The main focus of this white paper is on emerging and novel technologies in programming models and tools. Together with the traditional approaches, the white paper presents the PGAS parallel programming models and new approaches for programming accelerators, such as OpenACC. It is important that these emerging programming models can be combined with traditional ones for their uptake on exascale supercomputer. For this reason, we discuss in detail the interoperability of different programming approaches. Because we recognize that hand-optimization of parallel codes will be significantly more complex on exascale machines, we present recent progress in software frameworks for automatic tuning and run-time systems to schedule processes on million of computing units. Finally, an overview of the state of the art in parallel debuggers, correctness checkers and performance monitoring and analysis tools is presented focusing on which approaches can provide scalability on exascale machine.